2015-05-4
The DeSyRe project developed a novel DeSyRe SoC architecture and underlying concepts for reliability. Such SoCs have been shown to typically use 28 percent less energy and 48 percent less chip area while offering nine times lower hardware failure rate if designed with this novel architecture. DeSyRe’s industry partners are using the new concepts to help create safer cars and trains, medical devices that can live longer and are more reliable, brain models that are more advanced, and even easier-to-program embedded many-core systems.
Download "Safer travels and implants with DeSyRe systems"....
2015-03-12
Göteborg, Sweden – March 12, 2015 - Systems-on-a-chip for extremely critical applications would use 28 percent less energy and 48 percent less chip area while offering nine times lower hardware failure rate, if designed with the completely novel DeSyRe architecture. This would drastically reduce hospital costs and replacement rate of medical devices.
Download the press release with the results of the DeSyRe project....
2012-03-12
Dresden, March 12, 2012 - For pacemakers and other implantable medical devices there are three key factors: extreme reliability, small size, and long longevity. In the EU project DeSyRe, researchers tackle these issues with a new approach: building a reliable system on unreliable components. Ioannis Sourdis, project leader, explains the DeSyRe’s approach in a tutorial on “Hardware and software design and verification for safety critical electronic systems” during the DATE 2012 conference in Dresden.
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View DeSyRe's design for fault-tolerant Systems on Chip...
2012-01-04